Given the partial NMOS ROM decoder shown, having address inputs A2,
A1, and A0 (A0 is LSB), identify the decoder output (select line) Y.
4 is CORRECT. First assume Y = 1 (i.e. its selected) and then identify the address that will turn off every on-off transistor, so the output can be high. Specifically, when A2A1A0 = 100, the gates to each on-off transistor will be low, thus T2, T1, and T0 will all be OFF and Y will be high through the side R-transistor. Thus the answer is Y4 because address (100)2 = 4. Any other value for the address lines results in at least one transistor being ON, thereby connecting Y to Ground (Y=0).