This quiz covers flip-flops and clocks. Please refer to the lecture notes for background material covering this subject. (Go back to homepage.)

1. What frequency clock source will produce clock waveforms having a period equal to 5 us (5 microseconds)?

   Note:    M = 10^6 
            k = 10^3 
            m = 10^-3 
            u = 10^-6 
   

   1. .2 MHz
   2. .5 MHz
   3. 10 MHz
   4. 2 kHz
   5. 5 kHz

2. The logic circuit shown represents most closely the architecture of a
   1. Simple Latch
   2. SR Latch with Enable
   3. D Latch with Enable
   4. D Flip-Flop
   5. JK Flip-Flop
      
      
      
      

3. 2 kHz (2 kiloHertz) clock will produce clock waveforms having which of the following period values .

   Note:    M = 10^6 
            k = 10^3 
            m = 10^-3 
            u = 10^-6 
   

   1. T = 2 us
   2. T = 5 us
   3. T = 2 ms
   4. T =.5 ms
   5. T =.5 us

4. Which of the following will correctly complete the JK flip-flop truth table shown below?

                                          J K Qn | Qn+1 
                                          -------|-----
      1) 0   2) 0   3) 0   4) 0   5) 1    0 0 0  |  ? 
         1      1      0      0      1    0 1 1  |  ? 
         1      0      1      1      0    1 0 1  |  ? 
         0      0      1      0      1    1 1 1  |  ? 
   

5. Which of the following will correctly complete the D flip-flop truth table shown below?

                                            D Qn | Qn+1 
                                           ------|----- 
      1) 1   2) 1   3) 0   4) 0   5) 0      0 0  |  ?  
         1      1      0      0      1      0 1  |  ? 
         1      0      0      1      1      1 0  |  ? 
         1      1      1      1      0      1 1  |  ? 
   

6. Which of the following will correctly complete the JK flip-flop truth table shown below?

                                          J K Qn | Qn+1 
                                          -------|-----
      1) 0   2) 0   3) 0   4) 0   5) 1    0 0 0  |  ? 
         1      1      0      0      1    0 1 0  |  ? 
         1      0      1      1      0    1 0 0  |  ? 
         0      0      1      0      1    1 1 0  |  ? 
   

7. Qn is stable over which of the following clock regions?
   1. Region A
   2. Region B
   3. Region C
   4. Region D
   5. Region E

8. Refering to the clock regions of the last question, during what region should the inputs of a flip-flop be established to initiate a output change from Qn to Qn+1?
   1. Region A
   2. Region B
   3. Region C
   4. Region D
   5. Region E

9. The PRE and CLR (preset & clear) inputs of a master/slave JK flip-flop overide the JK inputs
   1. Unconditionally.
   2. Only after the clock input goes high.
   3. Only after the clock input goes low.
   4. Only if J = 0 and K = 0.
   5. Only if J and K are not connected to anything.